Course Outline

Week 1

 

9.02.14

Introduction  (1 hour)

Differences of analogue and digital systems. Analogue-digital interfacing.

Week 2

 

16.02.14

Number systems, binary codes and arithmetic operations  (5 hours)

Conversions between number systems: decimal, binary, hexadecimal, octal.


Week 3

23.02.14

Binary codes: BCD, Gray. Alphanumeric: ASCII, Unicode.

Binary arithmetic: +, -, x, /


Week 4

 

02.03.14

Gates and logic simplification (3 hours)

Logic gates. Boolean algebra - Boolean's and De Morgan's Theorems.


Week 5

 

9.03.14

Combinational Logic Networks (6 hours)

Minterm, maxterm, canonical SOP and POS, don’t care conditions, Algebraic simplifications of Boolean functions

[Test 1 - Covers materials in week 1 to week 4]

Week 6

 

16.03.14

Logic simplification using Karnaugh maps, Gate transformations and DeMorgan equivalent circuits

 


Week 7

 

23.03.14

Digital IC characteristics  (3 hours)

IC classification, CMOS vs TTL, performance characteristics (voltage levels, propagation delay, power dissipation, noise margin, fan-in, fan-out). Datasheets.

Glitches and Hazards


Week 8

 

30.03.14

Mid-Semester Break


Week 9

06.04.14

Combinational MSI  (6 hours)

Multiplexers: concepts, devices (74xl53 and 74xl5I), expansion.   
Decoders/code converters: concepts, devices (74xl38, 74xl39, 74x47), expansion.
Implementations of Boolean functions using multiplexers and decoders

Week 10

 

13.04.14

Encoders: concepts, devices (74xl48 and 74xl47), expansion.
Adders - half adder, full adder, ripple adder, device (74x283).
Comparators, device (74x85), Parity generator/checker, device (74x280)

[Test 2 - Covers materials in week 5 to week 9]

Week 11

 

20.04.14

Latches and flip-flops  (6 hours)

Differences between combinational and sequential circuits. SR latches, Gated SR latch, Gated JK latch.

Week 12

 

27.04.14

JK flip flop, D flip flop, T flip flop. 74x74 and 74x76 devices. Preset and clear functions.

Timing characteristics, timing diagrams.

Week 13

 

04.05.14

Sequential MSI  (6 hours)

Asynchronous counter - ripple counter, 74x293 device.

Synchronous and asynchronous counters, ripple counter, 74x293 and 74x163 devices.

Week 14

 

11.05.14

Register shift registers (SISO, SIPO, PISO, PIPO), shift register counters (Johnson and Ring),74xl64, 74xl65, 74xl94, 74xl95 devices.

[Test 3 - Covers materials in week 10 to week 13]

Week 15

 

18.05.14

Programmable Logic  (3 hours)                                                                                   

PLA, PAL, Memory (RAM, ROM), CPLD, FPGA


Proposed Dates

Test 1 – 19 March 2014 (Week 6)

Test 2 - 16 April 2014 (Week 10)

Test 3 – 14 May 2014 (Week 14)

 

All Wednesday nights from 8-10pm.  The venues are P16 Dewan Peperiksaan, BKT 3 and BKT 4. 



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